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+++ SCIOPTA BLOG ARCHIVE 2003-05 +++ SCIOPTA BLOG ARCHIVE 2003-05 +++ SCIOPTA BLOG ARCHIVE 2003-05 +++
BLOG ARCHIVE
  Posted: September 30, 2005 by Roland
MPC5200 SCIOPTA Real-Time Operating System supports Freescale MPC5200

Today Litronic AG is announcing the immediate availability of the SCIOPTA Real-Time Operating System for the Freescale MPC5200 processors.
The SCIOPTA MPC5200 RTOS is written in highly optimized assembler and specifically tuned for the MPC5200 Processors. This results in a very high performance and a low memory footprint.

Beside the fast Real-Time Kernel there is IPS (Internet Protocols, TCP/IP), IPS Applications (Web Server, DHCP, DNS, SMTP, Telnet, TFTP etc.), SFFS (Flash File Systems), USB support and the DRUID System Level Debugger available.

SCIOPTA MPC5200 is royalty free and supports actually the C/C++ compilers and environments from GNU GCC and Metrowerks. A precompiled version of GCC is included in the SCIOPTA CD delivery.

Freescales' MPC5200B

Freescale's highly integrated, cost-effective MPC5200B is well suited for networking, media, industrial control, and automotive applications. It delivers 760 MIPS with a Floating Point Unit (FPU), hardware Memory Management Unit (MMU) for fast task switching, is packed with I/O, and operates at only one watt. The MPC5200B serves the processing-intensive network media gateway, network access storage, set-top box, audio jukebox automotive, Internet access, industrial automation, image detection/analysis, and electronic/medical instrumentation markets.

With its successful foundation in the automotive/telematics market via the mobileGT™ alliance and platforms, all markets can now enjoy extended temperature, automotive qualification, and life cycles typically demanded in that industry. A solid choice of Real Time Operating Systems (RTOS) and development boards with Board Support Packages (BSPs) provides users with a complete and flexible set of solutions.

MPC5200B Products Highlights

The MPC5200B is based on a 400 MHz MPC603e PowerPC core with an integrated double precision Floating Point Unit (FPU) that is qualified at -40oC to +85oC. It incorporates a hardware-based memory management unit (MMU) for advanced memory protection schemes, fast task switching and broad RTOS support. The MPC5200B was designed for fast data throughput and processing. The integrated BestComm DMA controller offloads the main MPC603e core from I/O intensive data transfers. An integrated Double Data Rate (DDR) memory controller accelerates data access with an effective memory bus speed of 266 MHz. A high-speed PCI interface backed by the BestComm DMA controller and DDR memory support enables high-speed data transfers in and out of the MPC5200B. The MPC5200B is manufactured in 0.13 micron technology. Lead (Pb)-free RoHS compliant and Pb packages are available.
  Posted: November 10, 2004 by Roland
M16C SCIOPTA Real-Time Operating System for RENESAS M16C

Today Litronic AG is announcing the immediate availability of the SCIOPTA Real-Time Operating System for the RENESAS M16C microcontroller family.

SCIOPTA M16C is entirely written in assembler which results in a very high performance and a low memory footprint. The code size of 3.6 – 7.5 kbytes allows to use it also in pure single-chip applications. Supported controllers include specifically the M16C/60 series.

The pre-emptive multitasking real-time kernel supports the standard SCIOPTA message-based architecture. SCIOPTA M16C is fully dynamic. All system resources such as processes and message memory pools can be created and killed during run-time.

Beside the fast real-time kernel there is IPS (SCIOPTA Internet Protocols, TCP/IP) and Web Server support available. SCIOPTA M16C is royalty free and supports actually the C/C++ compilers and environments from Tasking and IAR.

RENESAS's M16C Platform

The M16C Family offers a robust platform of 32/16-bit CISC microcomputers featuring high ROM code efficiency, extensive EMI/EMS noise immunity, ultra-low power consumption, high-speed processing in actual applications, and numerous and varied integrated peripherals. Extensive device scalability from low- to high-end, featuring a single architecture as well as compatible pin assignments and peripheral functions, provides support for a vast range of application fields. In addition, our low-cost development environment and program correction function help you shorten product development time while greatly reducing total system costs.

The M16C Family consists of the following: M32C/90 Series, M32C/80 Series, M16C/80 Series, M16C/60 Series, M16C/30 Series, M16C/Tiny Series, M16C/20 Series, M16C/10 Series, and R8C/Tiny Series.

M16C/60

The M16C/60 Series has 1MB of memory space. Standard on-chip peripherals include 16-bit Multifunction Timers (incl. 3-phase inverter motor control function), UART/Clock Synchronous Serial Interface, Clock Synchronous Serial Interface, 10-bit A/D Converter, 8-bit D/A Converters, DMACs, CRC Calculation Circuit, Watchdog Timer, etc.
  Posted: July 20, 2004 by Roland
LPC2000 SCIOPTA Real-Time Operating System for ARM Supports LPC2000

Today Litronic AG is announcing the immediate availability of the SCIOPTA Real-Time Operating System for the Philips LPC2000 microcontroller family.

SCIOPTA LPC2000 is entirely written in assembler which results in a very high performance and a low memory footprint. The code size of 6-18 kbytes allows to use it also in pure single-chip applications.

The pre-emptive multitasking real-time kernel supports the standard SCIOPTA message-based architecture and includes a module concept.

Beside the fast real-time kernel there are IPS (SCIOPTA Internet Protocols, TCP/IP), Web Server, SFFS (SCIOPTA Flash File System) and USB support available. SCIOPTA LPC2000 is royalty free and supports actually the C/C++ compilers and environments from GNU GCC and ARM RealView. A precompiled version of GCC ARM is included in the SCIOPTA CD delivery.

PHILIPS LPC2000 Family

he 16/32-bit LPC2000 family is based on a 1.8V ARM7TDMI-S core operating at up to 60 MHz together with a wide range of peripherals including multiple serial interfaces, 10-bit ADC and external bus options. These controllers are designed for use in a range of applications including industrial control, automotive, medical, connectivity and any other general purpose embedded application requiring high performance and low power consumption in a cost-effective package.
  Posted: March 2, 2004 by Roland
MCF5282 SCIOPTA Real-Time Operating System ported to Freescale's MCF5282

Today Litronic AG is announcing the immediate availability of the SCIOPTA Real-Time Operating System for the Motorola MCF5282 microcontroller.

SCIOPTA ColdFire is entirely written in assembler which results in a very high performance and a low memory footprint. The code size of 24 kbytes allows to use SCIOPTA ColdFire also in pure single-chip applications.

The pre-emptive multitasking real-time kernel supports the standard SCIOPTA message-based architecture and includes a module concept.

Beside the fast real-time kernel there are IPS (SCIOPTA Internet Protocols, TCP/IP), Web Server, SFFS (SCIOPTA Flash File System) and USB support available.

SCIOPTA ColdFire is royalty free and supports actually the C/C++ compilers and environments from GNU GCC and Metrowerks. A precompiled version of GCC ColdFire is included in the SCIOPTA CD delivery.

Freescale's MCF5282

The MCF5282 is the first microcontroller based on Freescale Semiconductor's 32-bit ColdFire core integrated with Ethernet, Flash and CAN. This device offers advanced communications features, a rich peripheral set and a variety of supporting software and development tools.

The MCF5282 is designed to simplify embedded Ethernet-networked microcontroller applications. With its integrated 10/100 Mbps Ethernet MAC and network-ready applications software, the MCF5282 can bring standards-based networking to a variety of traditional MCU applications including food service equipment, security systems, vending machines, exercise equipment and industrial controllers. Applications in all of these areas will benefit from networking functions such as Web-based user interfaces, network time synchronization, and router/gateway functionality for legacy serial protocols.

Freescale's Coldfire

In 1994, the innovative ColdFire Microprocessor Family was added to Freescale's Legacy 68K Family tree. This new variable-length RISC 68K Family architecture delivers the aggressive price/performance required by the cost-sensitive embedded market. In striving to meet the needs of the market with this innovative architecture, Freescale evaluated high-level source code from many 68K embedded systems customers. Based on the results of this study, a reduced instruction set and addressing modes were identified which created an efficient environment for processor operation. Like most RISC processors, the majority of ColdFire processor instructions execute in a single cycle.
  Posted: September 29, 2003 by Roland
HCS12 SCIOPTA Real-Time Operating System ported to Motorola HCS12

Litronic AG today announced the immediate availability of SCIOPTA Real-time Operating System for the Motorola HCS12 and 68HC12 processor families. The SCIOPTA Compact Kernel is ported to HCS12, which is a specific SCIOPTA implementation for 16-Bit Microcontrollers.

SCIOPTA HC12 is entirely written in assembler which results in a very high performance and a low memory footprint of 6,1 kbytes. This allows to use SCIOPTA HC12 also in typical single-chip applications.

Despite the reduced size, SCIOPTA HC12 has a remarkable functionality. The pre-emptive multitasking real-time kernel supports the standard SCIOPTA message-based architecture, can manage up to 255 static or dynamic processes and can have up to 16 message pools which each can be configured individually.

SCIOPTA HCS12 is royalty free and supports actually the C/C++ compilers and environments from GNU GCC, Metrowerks, IAR and Cosmic.

Freescale's 68HC12

The MC68HC12 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (CPU12), flash EEPROM, RAM, EEPROM, asynchronous serial communications interface (SCI), serial peripheral inter-face (SPI), timer and 16-bit pulse accumulator, analog-to-digital converter (ADC) and pulse-width modulator (PWM). The chip is the first 16-bit microcontroller to include both byte-erasable EEPROM and flash EEPROM on the same device. System resource mapping, clock generation, interrupt control and bus interfacing are managed by the Lite integration module (LIM).

16-Bit CPU12

The 16-Bit CPU12 is upward compatible with M68HC11 instruction set, has interrupt stacking and a programmer's model identical to M68HC11, a 20-Bit ALU instruction queue, enhanced indexed addressing and fuzzy logic instructions.

The muliplexed bus can be single-chip or expanded and can be used in 16/16 wide or 16/8 narrow modes.
  Posted: February 25, 2003 by Roland
Sconf SCIOPTA Introduces Graphical Configuration Tools

SCONF is a new graphical tool that can be used to configure SCIOPTA systems. All systems settings for specific targets such as CPU, Compiler, memory definitions, timer setup and all static modules, processes and message pools can be configured in an easy and straight-forward way.

SCONF automatically generates three source files containing the configurable part of the kernel. These files will be included in the SCIOPTA build process. The configuration settings are stored in an external XML file.

SCIOPTA sconf.exe Configuration Tool

The kernel of a SCIOPTA system needs to be configured before you can generated the whole system. In the SCIOPTA configuration utility SCONF (sconf.exe) you will define the parameters for SCIOPTA systems such as name of systems, static modules, processes and pools etc.

The SCONF program is a graphical tool which will save all settings in an external XML file. If the setting are satisfactory for your system SCONF will generate three source files containing the configurable part of the kernel. These files must be included when the SCIOPTA system is generated.

A SCIOPTA project can contain different SCIOPTA Systems which can also be in different CPUs. For each SCIOPTA System defined in SCONF a set of source files will be generated.
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