SCIOPTA Systems AG is announcing the immediate availability of the SCIOPTA Real-Time Operating Systems for the MPC8641D processor.
The SCIOPTA MPC5643L RTOS is written in highly optimized assembler and specifically tuned for the MPC8641D processors. This results in a very high performance and a low memory footprint. The MPC86xx kernel is Power ArchitectureTM Book E-compliant (e600 core).
SCIOPTA MPC5643L is certified according to IEC61508 up to SIL3.
Beside the fast Real-Time Kernel there is IPS (Internet Protocols, TCP/IP), IPS Applications (Web Server, DHCP, DNS, SMTP, Telnet, TFTP etc.), SFFS (Flash File Systems), USB support, embedded GUI graphics support and the DRUID System Level Debugger available.
SCIOPTA is royalty free and supports actually the C/C++ compilers and environments from GNU GCC and Windriver/DIAB. A precompiled version of GCC is included on the SCIOPTA CD.
The MPC8641D uses two high-performance superscalar e600 cores running at up to 1.5 GHz. This three-issue machine has a compact 7-stage pipeline which is particularly efficient with code that branches unpredictably. It avoids the extensive delays associated with flushing a long pipeline on mispredicted branches . Unpredictable branching is typical of code paths driven by largely random arrival of different types of packets. These processors support up to 8 out-of-order instructions on the system bus that allows for making forward progress even while waiting for previous instructions to finish (ie, access to main memory required). The e600 has an on-board 128-bit vector processor for efficient data movement (useful for copying TCP payloads from kernel space to user space) and for math functions that rival a DSP.
The device has dual 64 bit (72b with ECC) DDR2 memory controllers to match the bandwidth requirements of the two cores. The memory controllers can be assigned to each core for increased OS isolation, or can be shared between the cores to ensure the most efficient usage of the memory bandwidth.
There are two flexible high-performance I/O ports. Dual 8-lane PCI Express ports leverage PCI legacy with a high-performance serial point-to-point link that is commonly used to connect to a variety of other on-board high-performance devices. The 4-lane serial RapidIO port, with its low software overhead, configuration simplicity, hardware error correction, and support for both memory mapped and packet-based transactions, is very well suited as a backplane interface.
There are four Ethernet controllers, supporting 10 Mbps, 100 Mbps, and 1000 Mbps. The Ethernet controllers have advanced capabilities for TCP and UPD checksum acceleration, QoS support, and packet header manipulation.